Data compression may be provided in data processing systems to reduce the time of data transmission in communication links, or to transmit broad-bandwidth signals via narrow-bandwidth communication channels. Also, data compression may be used to increase the quantity of data that can be stored in a given space, or to decrease the space needed to store a given quantity of data.
The compressed signals may be received over a communications link from any telecommunications source including, for example, satellite broadcast. Various conventional formats have been contemplated for compressed video signals, the standard currently favored being set forth by the Motion Picture Experts Group (MPEG). The MPEG standard defines a compression and decompression algorithm for motion-picture video services. MPEG is a bi-directional predictive coding compression standard, coded in accordance with discrete cosine transformation (DCT) processing. Picture elements are converted from spacial information into frequency domain information to be processed. Due to video compression, motion-picture images can be sent over a communication channel using only a fraction of conventional television channel. As a result, many more video channels can be carried over a given communication medium. Moreover, conventional telephone links are enabled to deliver broad-bandwidth television signals.
In the MPEG algorithm, each frame of a motion-picture video is defined either independently, or as a change from a previously displayed frame. A video scene may be described by a single independent infra-coded frame, or I-frame which shows the entire scene as it initially appears, and serves as a reference frame to derive compressed data for encoded change frames in advance of or following the I frame in the encoded frame sequence. Thus, the MPEG video compression technique eliminates the redundant transmission of unchanging elements of the scene.
The number of actual video frames to be coded into such I frames is set in the MPEG syntax, e.g., one reference frame for each fifteen frames, or every half second. Interspersed among successive I frames are frames generally of increased compression. A prediction is made of the composition of a video frame to formulate a prediction frame, termed a P frame, to be located a specific number of frames following or in advance of the next reference frame, the specific number also set in the MPEG syntax. Information from previous frames as well as later frames may be used in formulating the prediction. A P frame may be encoded from I frame information by partitioning the P frame into blocks of pixels, or motion blocks. A matching block is sought in the I frame for each motion block of the P frame. Motion vectors are used to indicate the displacement in the x and y directions between the matched blocks in the two frames. A P frame, as well as an I frame, may serve as matching block reference information for deriving another P frame.
Differences between the motion blocks and the matched blocks are also encoded. P frames are thus represented by less data, and are thus more compressed, than the encoded I frames.
"Delta" information is developed for coding frames, called B frames, between the actual (I) and predicted (P) frames, and between (P) frames also by looking at frames in both directions. Rather than updating a whole frame, only the changed (or delta) information is provided for the delta frames. Thus the total information coded, and then transmitted, is considerably less than required to supply the actual information in the total number of frames.
The MPEG algorithm is defined in the following International Organization for Standardization (ISO) specifications: ISO/IEC 11172, November 1991 (MPEG 1), and ISO/IEC WG11 N0501, July 1993 (MPEG 2).
By way of example, reference is made to U.S. Pat. No. 5,198,901 to Lynch of Mar. 30, 1993; to U.S. Pat. No. 5,293,229 to Iu of Mar. 8, 1994; to U.S. Pat. No. 5,311,310 to Jozawa et al. of May 10, 1994; to U.S. Pat. No. 5,361,105 to Iu of Nov. 1, 1994; to U.S. Pat. No. 5,386,234 to Veltman et al. of Jan. 31, 1995; and to U.S. Pat. No. 5,400,076 to Iwamura of Mar. 21, 1995. Those disclosures and citations referenced therein may be consulted for an understanding of the specific details of conventional MPEG compression and decompression arrangements.
As illustrated by the above identified patents, various schemes have been developed to carry out MPEG coding and decoding. Transmitted MPEG data generally includes I frame data, motion vector information for P frames and B frames, difference or residue data for predictive coding, and data indicative of a particular coding scheme used.
On decompression, an MPEG decoder in sequence uses the reference frames to form the prediction frames, which frames also may be used to construct the delta frames. Data is thus often decoded in an order different from the order in which frames are viewed. Decoding must be several frames ahead of the frame currently shown on video.
For example, MPEG coding and decoding may be used in a digital satellite television system that includes a transmitter for transmitting television signals to a satellite in a geosynchronous earth orbit. The satellite retransmits the received television signals to a terrestrial receiver equipped with a dish-like antenna.
Within the transmitter, analog video and audio signals are converted to respective digital signals compressed according to the MPEG encoding standard. The resultant digital signals are represented by a stream of packets including error correction data. The type of packets is identified by a header code. Packets corresponding to control data may also be added to the packet stream.
In the MPEG standard, the video information may be transmitted in the form of a luminance (Y) component and two color difference (U and V) components. For example, the first color difference component may represent the difference between the red image information and the luminance image information (R-Y), and the second color difference component may represent the difference between the blue image information and the luminance image information (B-Y). In addition, the color information is compressed because the two color difference components correspond to more than one picture element. The use of color difference components and the sharing of the color difference components between picture elements reduces the transmission bandwidth.
The digital information resulting from the compression and error correction encoding is modulated on a carrier using Quaternary Phase Shift Keying (QPSK) modulation and transmitted to a satellite for retransmission.
The terrestrial receiver comprises a tuner for selecting the appropriate carrier signal retransmitted by the satellite and for converting the frequency of the selected carrier to an intermediate frequency (IF) signal. A QPSK demodulator demodulates the IF signal and supplies it to an error-correcting decoder to correct demodulated packets representing video and audio information. An MPEG decoder decodes and decompresses video and audio packets to form digital video and audio signals supplied to a TV set.
A TV set top box serves to deliver compressed digital video and audio signals in real time usable form to one or more TV sets. FIG. 1 illustrates a block diagram of an exemplary prior art MPEG decoder 10 that may be used in the set top box. Encoded signals of blocks of a video frame are received successively at the input terminal and buffered at a buffer 11. The received signals comprise picture signal data and motion vector data, the latter data being prevalent in B frame and P frame signals. I frame data and P frame data serve as reference block data for the motion vectors contained in other B frame and P frame signals.
A portion of a display frame is illustrated in FIG. 2A, wherein a display object is positioned in a block at the lower left area. FIG. 2B illustrates a portion of a later display frame wherein the object has moved to another position in the display frame displaced in the x and y directions from the location in the frame of FIG. 2A. The original object may have changed somewhat, such as in dimension, shape color, etc., or have remained substantially unchanged. As shown, the object in the later frame occupies portions of four blocks. Video signals for the frame of FIG. 2B are coded with motion vector data indicating location displacement of blocks from the reference frame position as well as difference data that represent changes in picture content.
Blocks of video signal data from the buffer are fed successively to a demultiplexer 13, which separates motion vector information from picture signal components. The resulting picture signal is fed to a variable length decoder 15, which decodes each block to provide quantized transform coefficients. This block data is then fed successively to an inverse quantizer 17 and an inverse discrete cosine transform circuit 19 whereby block picture information is recovered.
The motion vector data for the current block is fed from the demultiplexer 13 to a motion vector calculating circuit 21. The motion vector calculating circuit receives a reference block of picture data from a frame memory 23 and provides compensation in accordance with motion vector data for the current block received from the demultiplexer. The resulting block picture data is combined with the picture information recovered from a discrete cosine transform circuit 19 at an adder 25. The reconstructed picture block thus obtained is stored as a new block in the frame memory 23. The frame memory 23 may be a dynamic random-access memory (DRAM) or synchronous DRAM storage. A frame selector circuit 27 controls arrangement of delivery of the decoded frames, all stored blocks correlated therewith, in the proper order. Reference is made to the Iwamura and Veltman et al. patents, identified previously, for further description of this prior art decoding scheme.
As shown in FIG. 3, in addition to an MPEG decoder and OSD 20, a conventional TV set top box may include a CPU 30 that controls a decoding procedure. For example, a CPU integrated circuit manufactured by Motorola may be used as the CPU 30. A system ROM 32 is coupled to the CPU 30 for storing CPU programming data, and compressed graphics data to be reproduced on a TV set screen. An on screen display (OSD) arrangement disclosed, for example, in U.S. Pat. No. 5,489,947 to Cooper of Feb. 6, 1996, incorporated herewith by reference, allows the graphics data supplied from the ROM 32 to be displayed on the screen together with the image represented by the received video signals, or in place of this image. For example, the system ROM 32 may store alphanumeric symbols and/or pictorial graphics representing status information, such as TV channel numbers or logos displayed on the TV set screen, together with video information from the corresponding TV channel. The OSD arrangement may be incorporated in the MPEG decoder 20 coupled to the CPU 30 for decoding the received compressed video and audio signals, and for decompressing the compressed graphic image data supplied from the system ROM 32. Via the MPEC decoder 20, the CPU 30 writes the compressed graphics data to the DRAM frame memory 23 that interacts with the MPEG decoder 20 to support decompression operations. Decompressed video, audio and graphics information is reproduced by a TV set 36 in accordance with a conventional TV standard such as NTSC, PAL or SECAM.
As discussed above, in addition to the graphics data, the frame memory 23 stores decoded blocks of received video information. Thus, a large amount of DRAM is needed to deliver acceptable picture resolution and quality. Such a large memory requirement makes the set top box expensive.
Therefore, it would be desirable to provide a TV set top box arrangement that would allow the DRAM storage capacity to be reduced without deteriorating picture resolution and quality. The savings of memory could be used to produce a higher quality graphics.
Further, as shown in FIG. 4, to read graphics image data, the CPU 30 supplies the ROM 32 via a 32-bit address bus CPU-A with an address signal that indicates an address of graphics data to be displayed on the TV screen. Alternatively, the address of CPU processing information required for CPU operations may be indicated. The requested data is delivered to the CPU 30 via a 16-bit data bus CPU-D. Then, the CPU 30 supplies the retrieved compressed graphics data to the MPEG decoder 10 for decompressing. The received CPU processing information supports CPU operations.
As illustrated in FIGS. 5A and 5B, in the conventional system, the address signal in the address bus CPU-A is active during all three cycles T.sub.0 -T.sub.2 of a CPU processing period. The data bus CPU-D is occupied with delivering the graphics data from the ROM 32 approximately from the middle of cycle T.sub.1 of one processing period until the middle of cycle T.sub.0 of the next processing period. For example, for a CPU integrated circuit manufactured by Motorola, each of the cycles T.sub.0 -T.sub.2 corresponds to a 16 MHz system clock cycle.
Accordingly, the CPU 30 is busy with handling the graphics data during a substantial portion of its processing period. It would be desirable to arrange the TV set top box so as to reduce the CPU involvement in the graphics data delivery, in order to allow the CPU to perform other required operations, for example, to support the MPEG decoding at higher rates.